CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
PACT XPP—A Self-Reconfigurable Data Processing Architecture
The Journal of Supercomputing
ReCoNet: Modeling and Implementation of Fault Tolerant Distributed Reconfigurable Hardware
SBCCI '03 Proceedings of the 16th symposium on Integrated circuits and systems design
PISA: a platform and programming language independent interface for search algorithms
EMO'03 Proceedings of the 2nd international conference on Evolutionary multi-criterion optimization
A multilayer framework supporting autonomous run-time partial reconfiguration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Evaluation of runtime task mapping using the rSesame framework
International Journal of Reconfigurable Computing - Special issue on Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10)
Hi-index | 0.00 |
There is trend towards networked and distributed hardware reconfigurable systems, complicating the design process at the system-level. This paper will provide a solution to the problem of design space exploration for such embedded systems of the next generation. We will show the problems occurring while exploring the design space at the system-level, leading to new properties for valid implementations. The novelty of this approach lies in the support of explicit communication modeling and time-multiplexed architecture modeling in a single model. The proposed design space exploration is based on Evolutionary Algorithms and a new slack-based list scheduler.