Design technology challenges for system and chip level designs in very deep submicron technologies

  • Authors:

  • James Lin

  • Affiliations:

  • National Semiconductor Corporation

  • Venue:
  • Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
  • Year:
  • 2003

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Abstract

With very deep submicron process technologies, previously ignorable phenomena now have great impact on the robustness of IC designs. At the same time, the smaller feature sizes also enable an exponential increase in number of functions (or transistor count) available on chip. Complexity in process technology and design is widening the Design Technology gap, which, if not addressed properly, will threaten the continuation of process scaling and the industry's ability to benefit from it. The complexity of process and design technology, its impact on new designs, new products development and future solutions will be discussed in this presentation.