Low-Density Parity-Check Decoder Architecture for High Throughput Optical Fiber Channels

  • Authors:

  • Anand Selvarathinam;Euncheol Kim;Gwan Choi

  • Affiliations:

  • -;-;-

  • Venue:
  • ICCD '03 Proceedings of the 21st International Conference on Computer Design
  • Year:
  • 2003

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Abstract

A requirement-specific decoder design for forward error-correctionin 2 Gbps optical fiber communication system ispresented.Low-density parity-check codes are used to achieve high bit errorrate performance. Several novel error- decoding architectures areproposed and their design configurations explored to identifyoptimal cost/performance design. Serial, parallel and scalablearchitectures are studied. The result is a scaleable architecturethat consists of 1.3 million CMOS gates running at 295 Mhz and itachieves a throughput of 2.51 Gbps.