Testability analysis of hierarchical finite state machines

Authors:
F. Martinolle;J. C. Geffroy;B. Soulas
Affiliations:
INSAT - DGE, 31077 Toulouse cedex, France;INSAT - DGE, 31077 Toulouse cedex, France;EDF - DER, Les Renardières, 77250, Morêt sur Loing, France
Venue:
EURO-DAC '91 Proceedings of the conference on European design automation
Year:
1991

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Abstract

We present a hierarchical analysis of interconnected finite state machines helpful for testability evaluation. Formal operators determine the controllable and observable functional parts of the modules of the hierarchy; several kinds of functional redundancies are deduced and their causes are diagnosed. A prototype written in Prolog validates these concepts.