A VHDL-based bus model for multi-PCB system design
EURO-DAC '94 Proceedings of the conference on European design automation
A simple and efficient bus management scheme that supports continuous streams
ACM Transactions on Computer Systems (TOCS)
Performance Analysis of Multilevel Bus Networks for Hierarchical Multiprocessors
IEEE Transactions on Computers
VHDL extensions for complex transmission line simulation
EDTC '97 Proceedings of the 1997 European conference on Design and Test
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