Preventing Crosstalk Delay using Fibonacci Representation

  • Authors:
  • Madhu Mutyam

  • Affiliations:
  • -

  • Venue:
  • VLSID '04 Proceedings of the 17th International Conference on VLSI Design
  • Year:
  • 2004

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Abstract

As the CMOS technology scaled down to deep sub-micronlevel, the crosstalk effects due to the coupling capacitancebetween interconnection lines has become one of themain performance limiting factors. Several methods suchas those based on routing strategies, skewing the timing ofsignals on adjacent wires, interleaving mutually exclusivebuses, precharging the bus, and bus encoding technique,have been proposed to eliminate/reduce the crosstalk delay.In this work, we propose a bus encoding technique usinga variant of binary Fibonacci representation to preventcrosstalk delay and give a recursive procedure to generatecrosstalk delay free binary Fibonacci codewords. We showthat m-bit crosstalk delay free binary Fibonacci codewordsare used to encode [log2(Fm+2)]-bit bus, where Fm+2 is the (m + 2)th Fibonacci number.So, a 32-bit bus can beencoded using 46-bit crosstalk delay free binary Fibonaccicodewords.