Hardware-based synchronization framework for heterogeneous RISC/coprocessor architectures
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
A distributed architecture model for heterogeneous multiprocessor system-on-chip design
ICESS'04 Proceedings of the First international conference on Embedded Software and Systems
| Hi-index | 0.00 |
Real-time multimedia applications that involveprocessing of video and audio streams demandcomputational performance of a few Giga operationsper second, which cannot be obtained using a singleprocessor. An embedded system intended for such anapplication must also support networking and IOinterfaces, which are best handled by dedicatedinterface processors that are coordinated by a house-keepingprocessor. Dedicated processors may also benecessary for parsing and processing video/audiostream and, video/graphics rendering. In this paper,we provide an overview of multiprocessorarchitectures that are evolving for such embeddedapplications. We argue that the VLSI designchallenges involved in designing an equivalentuniprocessor solution for the same application maymake such a solution prohibitively expensive, makingmultiprocessor SoC an attractive alternative.