Design of pipeline analog-to-digital converters via geometric programming
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A low-power design methodology for high-resolution pipelined analog-to-digital converters
Proceedings of the 2003 international symposium on Low power electronics and design
A Statistical Approach to Estimate the Dynamic Non-Linearity Parameters of Pipeline ADCs
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
| Hi-index | 0.00 |
Pipelining is the promising approach to implement high-speed medium-to-high resolution analog-to-digital converters with minimum power consumption. In this paper, the most important specifications of a pipelined ADC including the signal-to-noise-and-distortion ratio and spurious-free dynamic range as well as the total current consumption of the converter are presented in closed-form equations and an optimization methodology for design of pipelined ADCs is suggested. Simulation results confirming the effectiveness of the methodology are presented.