Standards for system-level design: practical reality or solution in search of a question?
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Automatic generation of embedded memory wrapper for multiprocessor SoC
Proceedings of the 39th annual Design Automation Conference
Online Scheduling for Block-Partitioned Reconfigurable Devices
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Managing a Reconfigurable Processor in a General Purpose Workstation Environment
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A virtual integrated network emulator on XEN (viNEX)
Proceedings of the 2nd International Conference on Simulation Tools and Techniques
Efficient task scheduling for runtime reconfigurable systems
Journal of Systems Architecture: the EUROMICRO Journal
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
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Reconfigurable Systems-on-Chip (SoC) consist of large Field-Programmable Gate-Arrays (FPGAs) and standard processors. The reconfigurable logic can be used for application-specific coprocessors to speedup execution of applications. The widespread use is limited by the complexity of interfacing software applications with coprocessors. We present a virtualisation layer that lowers the interfacing complexity and improves the portability. The layer shifts the burden of moving data between processor and coprocessor from the programmer to the Operating System (OS). A reconfigurable SoC running Linux is used to prove the concept.