Energy-Efficient Design for Highly Associative Instruction Caches in Next-Generation Embedded Processors

Authors:
Juan Luis Aragon;Dan Nicolaescu;Alex Veidenbaum;Ana-Maria Badulescu
Affiliations:
-;-;-;-
Venue:
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Year:
2004

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Abstract

This paper proposes a low-energy solution for CAM-based highly associative I-caches using a segmented wordline and a predictor-based instruction fetch mechanism. Not all instructions in a given I-cache fetch are used due to branches. The proposed predictor determines which instructions in a cache access will be used and does not fetch any other instructions. Results show an average I-cache energy savings of 44% over the baseline case and 6% over thesegmented case with no negative impact on performance.