ACM Transactions on Computer Systems (TOCS)
Advances in Network Simulation
Computer
Fast address look-up for internet routers
BC '98 Proceedings of the IFIP TC6/WG6.2 Fourth International Conference on Broadband Communications: The future of telecommunications
A timing-accurate modeling and simulation environment for networked embedded systems
Proceedings of the 40th annual Design Automation Conference
Algorithms for packet classification
IEEE Network: The Magazine of Global Internetworking
Modeling and simulation of mobile gateways interacting with wireless sensor networks
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
TLM/network design space exploration for networked embedded systems
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Modeling and simulation alternatives for the design of networked embedded systems
Proceedings of the conference on Design, automation and test in Europe
System/network design-space exploration based on TLM for networked embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Including real-life application code into power aware network simulation
Proceedings of the 3rd International ICST Conference on Simulation Tools and Techniques
Hi-index | 0.00 |
Networked embedded systems pose several challenges in the modeling, simulation, and design domains. The presence of the network, in particular, makes an already critical task such as HW/SW co-simulation even more complex, since a three-way (HW/SW/network) co-simulation and codesign capability is required. Modeling of networks and their interaction with hardware and software is thus key for an effective design methodology at early stages of the design flow.In this work, we present a HW/SW/network co-simulation and co-design methodology, based on the integration of heterogeneous simulation environments such as SystemC and NS (Network Simulator). This methodology has been successfully applied to the design of asystem-on-chip performing the fast path of IPv4 routing, allowing to explore different HW/SW allocation for different network configurations.