Area Efficient High Speed Elliptic Curve Cryptoprocessor for Random Curves

Authors:
A. K. Daneshbeh;M. A. Hasan
Affiliations:
-;-
Venue:
ITCC '04 Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04) Volume 2 - Volume 2
Year:
2004

Citing 0
Cited 2

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Abstract

A novel hardware processor to compute elliptic curvescalar multiplication is proposed. It is based on a bitserial systolic architecture which performs both binaryfield division and multiplication by using a single typeprocessing element. The field elements are representedin standard form. This scalable unidirectional bit serialsystolic architecture can process finite fields of anydimension and any defining irreducible polynomial. Itis otimized to have the least storage space while a clockrate over 700 MHz is achieved in the CMOS 0.18驴 technologyusing standard library cells.