IEEE Transactions on Computers
HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor
Integration, the VLSI Journal - Special issue: Embedded cryptographic hardware
On efficient implementation of FPGA-based hyperelliptic curve cryptosystems
Computers and Electrical Engineering
Towards minimizing memory requirement for implementation of hyperelliptic curve cryptosystems
ISPEC'07 Proceedings of the 3rd international conference on Information security practice and experience
Hyperelliptic curve coprocessors on a FPGA
WISA'04 Proceedings of the 5th international conference on Information Security Applications
Hardware/software co-design for hyperelliptic curve cryptography (HECC) on the 8051 µP
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Performance of HECC coprocessors using inversion-free formulae
ICCSA'06 Proceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part III
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Regarding the overall speed and power consumption,cryptographic applications in embedded environments likePDAs or mobile communication devices can benefit fromspecially designed cryptosystems with fixed parameters. Inthis contribution, we propose a highly efficient algorithm fora hyperelliptic curve cryptosystem (HECC) of genus two,well suited for these applications on constrained devices.This work presents a major improvement of HECC arithmeticfor certain non-supersingular curves defined overfields of characteristic two. We optimized the group doublingoperation and managed to speed up the whole cryptosystemby approximately 27% compared to the previouslyknown most efficient case. Furthermore, an actual implementationof the new formulae on an embedded processorshows its practical relevance. A scalar multiplication canbe performed in approximately 50ms on an 80MHz embedded device.