High-speed hardware implementations of Elliptic Curve Cryptography: A survey
Journal of Systems Architecture: the EUROMICRO Journal
Integration, the VLSI Journal
Hi-index | 0.00 |
In this paper a parallel architecture for the computationof Hessian elliptic curve scalar multiplication over binaryfields is presented. The architecture was designed as generalas possible trying to make no assumptions about thespecific hardware platform to be used by the designers. Theidea of using parallel strategies was considered in every designstage and implemented as much as hardware resourcesallowed us to do it so. The design results reported in thiswork allow us to compute GF(2191) elliptic curve scalarmultiplication operations in about 114.7驴 Secs.