System architecture for wireless sensor networks

• Authors: David E. Culler;Jason Lester Hill
• Venue: System architecture for wireless sensor networks
• Year: 2003

In this thesis we present and operating system and three generations of a hardware platform designed to address the needs of wireless sensor networks. Our operating system, called TinyOS uses an event based execution model to provide support for fine-grained concurrency and incorporates a highly efficient component model. TinyOS enables us to use a hardware architecture that has a single processor time shared between both application and protocol processing. We show how a virtual partitioning of computational resources not only leads to efficient resource utilization but allows for a rich interface between application and protocol processing. This rich interface, in turn, allows developers to exploit application specific communication protocols that significantly improve system performance. The hardware platforms we develop are used to validate a generalized architecture that is technology independent. Our general architecture contains a single central controller that performs both application and protocol-level processing. For flexibility, this controller is directly connected to the RF transceiver. For efficiency, the controller is supported by a collection of hardware accelerators that provide basic communication primitives that can be flexibility composed into application specific protocols. The three hardware platforms we present are instances of this general architecture with varying degrees of hardware sophistication. The Rene platform serves as a baseline and does not contain any hardware accelerators. It allows us to develop the TinyOS operating system concepts and refine its concurrency mechanisms. The Mica node incorporates hardware accelerators that improve communication rates and synchronization accuracy within the constraints of current microcontrollers. As an approximation of our general architecture, we use Mica to validate the underlying architectural principles. The Mica platform has become the foundation for hundreds of wireless sensor network research efforts around the world. It has been sold to more than 250 organizations. Spec is the most advanced node presented and represents the full realization of our general architecture. It is a 2.5 mm x 2.5 mm CMOS chip that includes processing, storage, wireless communications and hardware accelerators. We show how the careful selection of the correct accelerators can lead to orders-of-magnitude improvements in efficiency without sacrificing flexibility. In addition to performing a theoretical analysis on the strengths of our architecture, we demonstrate its capabilities through a collection of real-world application deployments.