SCG '86 Proceedings of the second annual symposium on Computational geometry
Construction of three-dimensional Delaunay triangulations using local transformations
Computer Aided Geometric Design
Spatial tessellations: concepts and applications of Voronoi diagrams
Spatial tessellations: concepts and applications of Voronoi diagrams
Implementation and evaluation of an efficient parallel Delaunay triangulation algorithm
Proceedings of the ninth annual ACM symposium on Parallel algorithms and architectures
Computational geometry: algorithms and applications
Computational geometry: algorithms and applications
Improved incremental randomized Delaunay triangulation
Proceedings of the fourteenth annual symposium on Computational geometry
Primitives for the manipulation of general subdivisions and the computation of Voronoi
ACM Transactions on Graphics (TOG)
A parallel dynamic-mesh Lagrangian method for simulation of flows with dynamic interfaces
Proceedings of the 2000 ACM/IEEE conference on Supercomputing
Image Reconstruction Using Data-Dependent Triangulation
IEEE Computer Graphics and Applications
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This paper describes a newly proposed simple and efficient parallel algorithm for the construction of the Delaunay triangulation (DT) in E2 by randomized incremental insertion. The construction of the DT is one of the fundamental problems in computer graphics. The proposed algorithm is designed for parallel systems with shared memory and several processors. Such hardware (especially with two-processors) became available in the last few years thanks to low prices and at present, there is still a lack of parallel algorithms that are simple to implement and efficient enough to be an attractive alternative to long existing serial algorithms. The designed algorithm incorporates new method for synchronization among PEs based on the simple geometric test (i.e. if no other points lie in the circum-circle of accessed triangle, this triangle can be modified independently on others PEs). We implemented the algorithm in C++ and tested it on workstations up to four processors where we reached relatively good speed-up to our serial implementation. When only two processors were used we reached even super-linear speed-up.