Parallel algorithms for data compression
Journal of the ACM (JACM)
Data compression using dynamic Markov modelling
The Computer Journal
A parallel architecture for high-speed data compression
Journal of Parallel and Distributed Computing
A multiple processor approach to data compression
SAC '98 Proceedings of the 1998 ACM symposium on Applied Computing
A Corpus for the Evaluation of Lossless Compression Algorithms
DCC '97 Proceedings of the Conference on Data Compression
Real-time VLSI compression for high-speed wireless local area networks
DCC '95 Proceedings of the Conference on Data Compression
Algorithms and data structures for compressed-memory machines
IBM Journal of Research and Development
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Abstract--Logic density increases have made feasible the implementation of multiprocessor systems able to meet the intensive data processing demands of highly concurrent systems. This paper describes the research and hardware implementation of a high-performance parallel multicompressor chip. A detailed investigation into the performances of alternative input and output routing strategies for realistic data sets demonstrate that the design of parallel compression devices involves important trade offs that affect compression performance, latency, and throughput. The most promising approach is implemented into FPGA hardware and is shown to provide a scalable compression solution at throughputs able to cope with the demands of modern high-bandwidth applications.