Implementing Pfairness on a Symmetric Multiprocessor

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RTAS '04 Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium
Year:
2004

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Abstract

We consider the implementation of a Pfair scheduleron a symmetric multiprocessor (SMP). Simulations presented herein suggest that bus contention resulting from simultaneous scheduling decisions can substantially degrade performance. To correct this problem, we propose a staggered model for Pfair scheduling under which scheduling points are uniformly distributed over time.