IEEE Spectrum
EXCL: A circuit extractor for IC designs
DAC '84 Proceedings of the 21st Design Automation Conference
Hi-index | 0.00 |
With the deep submicron process technology used widely, fast and accurate extraction of parasitic parameters becomes very important for VLSI designs. In this paper, a fast and accurate method is presented for 3-D interconnect resistance extraction. This method is the boundary element method accelerated by the improved Quasi-Multiple Medium (QMM) algorithm. The improvement upon QMM includes the new strategy of cutting conductors un-averagely, only calculating conductors in current paths, dividing boundary elements only in one direction if possible and using linear elements for some straight conductors. Experiments on actual layout cases show that, compared with the famous Raphael, the proposed method has a speedup of hundreds while preserving higher accuracy.