A 4 GHz dual modulus divider-by 32/33 prescaler in 0.35͘m CMOS technology

Authors:
Fernando P. H. de Miranda;João Navarro S., Jr.;Wilhelmus A. M. Van Noije
Affiliations:
Universidade de São Paulo, São Paulo, Brasil;Universidade de São Paulo, São Paulo, Brasil;Universidade de São Paulo, São Paulo, Brasil
Venue:
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Year:
2004

Citing 1
Cited 1

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Abstract

The design of a dual modulus prescaler 32/33 in a 0.35μm CMOS technology is presented. The prescaler is a circuit employed in high frequency synthesizer designs. In the proposed circuit the technique called Extended True Single Phase Clock (E-TSPC), an extension of the True Single Phase Clock (TSPC) technique, was applied. Additionally some new structures to double the data output rate are also employed. Simulations, based on the prescaler layout, were carried out and the results indicate that the circuit can reach up to 4 GHz with 4.38 mW of power consumption and power supply of 3.3 V.