Proceedings of the 19th ACM Great Lakes symposium on VLSI
An ILP formulation for task mapping and scheduling on multi-core architectures
Proceedings of the Conference on Design, Automation and Test in Europe
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This talk will first review the challenges in the design of emerging complex systems-on-a-chip (SoC) at STMicroelectronics, from the perspective of our customers' requirements. We then present an approach to effectively integrate heterogenous parallel components - H/Wor S/W - into a homogeneous programming environment. This approach, supported by ST's MultiFlex multi-processing SoC environment, allows for the combination of a range of heterogeneous processing elements, supported by high-level programming models. Two programming models are supported: a distributed system object component (DSOC) message passing model, and a symmetrical multi-processing (SMP) model using shared memory. To illustrate the concepts discussed in this paper, we have applied the MultiFlex technology to the mapping of a high-level MPEG4 video encoder (VGA resolution at 30 frames per second) onto a mixed multi-processor and hardware platform.