LiPaR: A light-weight parallel router for FPGA-based networks-on-chip
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
A multi-path routing scheme for torus-based NOCs
International Journal of Computers and Applications
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This paper proposes a Network-on-Chip architecture that offers high flexibility and performance.It is used in a System-on-Chip platform for future multimedia mobile devices.The network is packet switching wormhole network with virtual-channel flow control and source routing.The initial implementation results for a network router show its feasibility and size comparable with other available solutions.