A high-level requirements engineering methodology for electronic system-level design
Computers and Electrical Engineering
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The size of today's designs makes their validation very time consuming. To manage their complexity, an evolution towards higher levels of abstraction is mandatory. This paper addresses the automatic validation of high-level requirements. It presents an approach to cope with their modeling and conceptual validation. This methodology relies on the use of a very high level formal language for modeling requirements and on characterization of error patterns for their validation. It allows effective modeling and early detection of errors in hardware design cycles.