Background Data Organisation for the Low-Power Implementation in Real-Time of a Digital Audio Broadcast Receiver on a SIMD Processor

  • Authors:
  • P. Op de Beeck;C. Ghez;E. Brockmeyer;M. Miranda;F. Catthoor;G. Deconinck

  • Affiliations:
  • IMEC and Katholieke Universiteit Leuven;IMEC;IMEC;IMEC;IMEC and Katholieke Universiteit Leuven;Katholieke Universiteit Leuven

  • Venue:
  • DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
  • Year:
  • 2003

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Abstract

In this work we illustrates the strong interaction between the data organisation in background memory and the data format required for sub-word level acceleration. The impact of such interaction is demonstrated on the implementation of a Digital Audio Broadcast Channel Decoder on a TriMedia processor, where data format transformations applied on the background memory data enable a substantially better exploitation of the available Single Instruction Multiple Data instructions. As a result, a factor two reduction for both execution time and data memory energy is achieved.