Generative communication in Linda
ACM Transactions on Programming Languages and Systems (TOPLAS)
Communications of the ACM
Advances in Network Simulation
Computer
Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip
ICCD '02 Proceedings of the 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD'02)
Modeling and Analysis of Heterogeneous Industrial Networks Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 3
A timing-accurate HW/SW co-simulation of an ISS with SystemC
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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This paper describes a design methodology for the estimation of bus performance of a tuplespace for factory automation. The need of a tuplespace is motivated by the characteristics of typical embedded architectures for factory automation. We describe the features of a bus for embedded applications and the problem of estimating its performance, and present a rapid prototyping design methodology developed for a qualitative and quantitative estimation. The methodology is based on a mix of different modeling languages such as Java, C++, SystemC and Network Simulator2 (NS2). Its application allows to estimate the expected performance of the bus under design in relation to the developed tuplespace.