Evaluation of Error-Resilience for Reliable Compression of Test Data
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Enhancing error resilience for reliable compression of VLSI test data
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Test data compression using efficient bitmask and dictionary selection methods
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper presents a novel technique for achieving error-resilience to bit-flips in compressed test data streams.Error-resilience is related to the capability of a test data stream (or sequence) to tolerate bit-flips which may occur in an Automatic Test Equipment (ATE), eitherin the electronics components of the loadboard or in the high speed serial communication links between the user interface workstation and the head.Initially, it will be shown that errors caused by bit-flips can seriously degrade test quality (as measured by the coverage), such degradation is very significant for variable codeword techniques such as Huffman coding.To address this issue a variable-to-constant compression technique (namely Tunstall coding) is proposed.Using Tunstall coding and bit-padding to preserve vector boundaries, an error-resilient compression technique is proposed.This technique requires a simple algorithm for compression and its hardware for decompression is very small, while achieving a much higher error-resilience against bit-flips compared with previous techniques (albeit at a small reduction in compression).Simulation results on benchmark circuits are provided to substantiate the validity of this approach in an ATE environment.