FPGA implementations of elliptic curve cryptography and Tate pairing over a binary field
Journal of Systems Architecture: the EUROMICRO Journal
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ICICS'07 Proceedings of the 9th international conference on Information and communications security
Efficient implementation of elliptic curve cryptography using low-power digital signal processor
ICACT'10 Proceedings of the 12th international conference on Advanced communication technology
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We present a hardware architecture for an Elliptic Curve Cryptography System performing the three basic cryptographic schemes: DH key generation, encryption and digital signature. The architecture is described by using hardware description languages, specifically Handel C and VHDL. Because of the sequential nature of the cryptographic algorithms, they are written in Handel C language. The critical part of the cryptosystem is a module performing the scalar multiplication operation. This module has been written in VHDL to let further improvements. The points of the elliptic curve are represented in projective coordinates working over the two-characteristic finite field and using polynomial basis. A prototype of this hardware architecture is implemented on a Xilinx Virtex II FPGA device.