Optimized high-order finite difference wave equations modeling on reconfigurable computing platform
Microprocessors & Microsystems
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ACM Transactions on Design Automation of Electronic Systems (TODAES)
C is for circuits: capturing FPGA circuits as sequential code for portability
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
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CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Accelerating seismic computations using customized number representations on FPGAs
EURASIP Journal on Embedded Systems - FPGA supercomputing platforms, architectures, and techniques for accelerating computationally complex algorithms
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Hardware/software co-design for energy-efficient seismic modeling
Proceedings of 2011 International Conference for High Performance Computing, Networking, Storage and Analysis
Poster: high performance FPGA-based implementation of the seismic modeling of the RTM algorithm
Proceedings of the 2011 companion on High Performance Computing Networking, Storage and Analysis Companion
FPGA-based architecture to speed-up scientific computation in seismic applications
International Journal of High Performance Systems Architecture
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Migration is the most important seismic data processing method that recovers subsurface images of the Earth's interior using surface-recorded data volumes obtained from seismic reflection surveys. A reconfigurable coprocessor platform called SPACE (Seismic data Processing Accelerator with reConfigurable Engine) using Field Programmable Gate Array (FPGA) technology is proposed in this paper to speed up these computationally demanding and data-intensive seismic migration applications. The proposed SPACE platform is characterized by its simple architecture and abundant on-board memory resources along with ultra-wide memory bandwidth, which also makes the platform suitable for other seismic data processing methods or some large-scale scientific computing applications. The time-consuming kernel part of the Pre-Stack Kirchhoff Time Migration (PSTM) algorithm is programmed into the FPGA-based coprocessor platform, which acts as a hardware accelerator attached to an Intel-based workstation through the local Peripheral Controller Interface (PCI) bus. Improved performance can be achieved by integrating a number of parallel running fully pipelined arithmetic modules into a single FPGA chip. Our simulation results show that the proposed coprocessor platform operating at a conservative speed of 50 MHz can calculate the Kirchhoff summations for 50 million points per second, which is about 15.6 times faster than a referential 2.4 GHz Pentium 4 workstation. The impressive performance of the proposed platform implies its broad applications in seismic data processing industry.