Computer Architecture; A Quantitative Approach
Computer Architecture; A Quantitative Approach
Accelerating Seismic Migration Using FPGA-Based Coprocessor Platform
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
BEE2: A High-End Reconfigurable Computing System
IEEE Design & Test
Optimized high-order finite difference wave equations modeling on reconfigurable computing platform
Microprocessors & Microsystems
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Accelerating seismic computations using customized number representations on FPGAs
EURASIP Journal on Embedded Systems - FPGA supercomputing platforms, architectures, and techniques for accelerating computationally complex algorithms
Accelerating Compute-Intensive Applications with GPUs and FPGAs
SASP '08 Proceedings of the 2008 Symposium on Application Specific Processors
Practical Pre-stack Kirchhoff Time Migration of Seismic Processing on General Purpose GPU
CSIE '09 Proceedings of the 2009 WRI World Congress on Computer Science and Information Engineering - Volume 02
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Hardware accelerators like GPGPUs and FPGAs have been used as an alternative to conventional CPU architectures in scientific computing applications and have shown considerable speed-ups on them. In this context, this work presents an FPGA-based solution that explores efficiently the data reuse and spatial and time domain parallelism for the first computational stage of the reverse time migration (RTM) algorithm, the seismic modelling. We also implemented the same algorithm for some CPUs and GPGPU architectures and our results showed that an FPGA-based approach can be a feasible solution to improve performance. Experimental results showed similar performance when compared to the GPGPU and up to 28.91 times speed-up when compared to CPUs. In terms of energy efficiency, the FPGA is almost 23 times and 1.75 times more efficient than the CPU and GPGPU, respectively. We also discuss some other features and possible optimisations that can be included in the proposed architecture that can make this performance even better.