Fast module mapping and placement for datapaths in FPGAs
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Proceedings of the 2001 ACM/IEEE conference on Supercomputing
Hardware-assisted simulated annealing with application for fast FPGA placement
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Implementation of BEE: a real-time large-scale hardware emulation engine
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Hardware-Assisted Fast Routing
FCCM '02 Proceedings of the 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment
RSP '03 Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP'03)
An FPGA implementation of the two-dimensional finite-difference time-domain (FDTD) algorithm
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
FPGA-Based Acceleration of the 3D Finite-Difference Time-Domain Method
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Designing BEE: a hardware emulation engine for signal processing in low-power wireless applications
EURASIP Journal on Applied Signal Processing
An integrated debugging environment for reprogrammble hardware systems
Proceedings of the sixth international symposium on Automated analysis-driven debugging
A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
A practical FPGA-based framework for novel CMP research
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Coprocessor design to support MPI primitives in configurable multiprocessors
Integration, the VLSI Journal
ATLAS: a chip-multiprocessor with transactional memory support
Proceedings of the conference on Design, automation and test in Europe
A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Reconfigurable computing for learning Bayesian networks
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Exploiting process locality of reference in RTL simulation acceleration
EURASIP Journal on Embedded Systems - Reconfigurable Computing and Hardware/Software Codesign
Full-system chip multiprocessor power evaluations using FPGA-based emulation
Proceedings of the 13th international symposium on Low power electronics and design
Hardwired Networks on Chip in FPGAs to Unify Functional and Con?guration Interconnects
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
Searching for Transient Pulses with the ETA Radio Telescope
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Automated architecture synthesis for parallel programs on FPGA multiprocessor systems
Microprocessors & Microsystems
A multi-fpga 10x-real-time high-speed search engine for a 5000-word vocabulary speech recognizer
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Performance and power of cache-based reconfigurable computing
Proceedings of the 36th annual international symposium on Computer architecture
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
A message-passing hardware/software cosimulation environment for reconfigurable computing systems
International Journal of Reconfigurable Computing - Special issue on selected papers from ReConFig 2008
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
A flexible DSP architecture for MIMO sphere decoding
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Axel: a heterogeneous cluster with FPGAs and GPUs
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
High-throughput Bayesian network learning using heterogeneous multicore computers
Proceedings of the 24th ACM International Conference on Supercomputing
Reconfiguration support for vector operations
International Journal of High Performance Systems Architecture
Performance evaluation of concurrently executing parallel applications on multi-processor systems
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
MPI as a Programming Model for High-Performance Reconfigurable Computers
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Design and implementation of a single-frequency mesh network using OpenAirInterface
EURASIP Journal on Wireless Communications and Networking - Special issue on simulators and experimental testbeds design and development for wireless networks
Platforms and testbeds for experimental evaluation of cognitive ad hoc networks
IEEE Communications Magazine
High-level design and validation of the BlueSPARC multithreaded processor
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special section on the ACM IEEE international conference on formal methods and models for codesign (MEMOCODE) 2009
High-performance reconfigurable hardware architecture for restricted Boltzmann machines
IEEE Transactions on Neural Networks
Implementation and evaluation of an arithmetic pipeline on FLOPS-2D: multi-FPGA system
ACM SIGARCH Computer Architecture News
A MIMO decoder accelerator for next generation wireless communications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Building a multi-FPGA virtualized restricted boltzmann machine architecture using embedded MPI
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
High performance programmable FPGA overlay for digital signal processing
ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications
A minimalist cache coherent MPSoC designed for FPGAs
International Journal of High Performance Systems Architecture
A performance evaluation of CUBE: one-dimensional 512 FPGA cluster
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
FPGA-based architecture to speed-up scientific computation in seismic applications
International Journal of High Performance Systems Architecture
Microprocessors & Microsystems
A comparative study of cognitive radio platforms
Proceedings of the International Conference on Management of Emergent Digital EcoSystems
Energy-efficient scheduling on multi-FPGA reconfigurable systems
Microprocessors & Microsystems
An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems
ACM Transactions on Embedded Computing Systems (TECS)
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The BEE2 project is developing a reusable, modular, and scalable framework for designing high-end reconfigurable computers, including a processing-module building block and several programming models. Using these elements, BEE2 can provide over 10 times more computing throughput than a DSP-based system with similar power consumption and cost, and over 100 times that of a microprocessor-based system.