Implementing a high-performance multithreaded microprocessor: a case study in high-level design and validation

  • Authors:
  • Eric S. Chung;James C. Hoe

  • Affiliations:
  • Computer Architecture Lab at Carnegie Mellon, Carnegie Mellon University, Pittsburgh, PA;Computer Architecture Lab at Carnegie Mellon, Carnegie Mellon University, Pittsburgh, PA

  • Venue:
  • MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
  • Year:
  • 2009

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Abstract

We have developed a 16-way multithreaded microprocessor called BlueSPARC. This in-order, high-throughput processor incorporates complex features such as privileged operations, memory management, and a non-blocking cache subsystem. When supported by a hybrid simulation technique that handles rare, unimplemented behaviors in a software host, the BlueSPARC microprocessor runs unmodified UltraSPARC III-based commercial applications on Solaris 8 while hosted on a single Xilinx XCV2P70 FPGA clocked at 90MHz. This significant effort was achieved in under one man-year using a high-level language and a high-level validation approach. In the first part of the paper, we describe our experience in applying the Bluespec SystemVerilog (BSV) language to develop a large hardware design that must meet specific area and performance requirements. In the second part of the paper, we present the FPGA-accelerated validation approach we employed to check the correct execution of real multithreaded programs running on the BlueSPARC processor. We discuss the challenges and our solutions to validation in the presence of full-system interactions and microarchitectural nondeterminism.