Energy Efficient Coarse-Grain Reconfigurable Array for Accelerating Digital Signal Processing
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
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In this paper, a high performance reconfigurable coarse-grain data-path, part of a mixed-granularity reconfigurable platform, is presented. The computational resources are coarse grain components of the same type. An automated methodology for mapping DSP applications on the data-path is also presented, and it is based on unsophisticated, yet efficient, algorithms. Results on DSP benchmarks show the performance improvements over previously published high-performance data-paths.