A Theory for Multiresolution Signal Decomposition: The Wavelet Representation
IEEE Transactions on Pattern Analysis and Machine Intelligence
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Efficient realizations of encoders and decoders based on the 2-D discrete wavelet transform
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A VLSI architecture for lifting-based forward and inverse wavelettransform
IEEE Transactions on Signal Processing
Line-based, reduced memory, wavelet image compression
IEEE Transactions on Image Processing
Optimal memory organization for scalable texture codecs in MPEG-4
IEEE Transactions on Circuits and Systems for Video Technology
Design of wavelet-based image codec in memory-constrained environment
IEEE Transactions on Circuits and Systems for Video Technology
Lifting factorization-based discrete wavelet transform architecture design
IEEE Transactions on Circuits and Systems for Video Technology
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Recently, a fast spatial combinative lifting algorithm (SCLA) for performing the wavelet transform (WT) was presented by Meng and Wang, and the SCLA speeds up the well-known lifting scheme presented by Daubechies and Sweldens. Employing the concept in the block-based WT by Bao and Kuo, this letter presents an efficient cache-based SCLA (CSCLA) for performing the WT. Theoretically, the number of total arithmetical operations required in the proposed CSCLA is equal to that in the SCLA. Experimental results confirm the computational advantage of our proposed CSCLA when compared to some other previous results. In addition, the VTune Performance Analyzer is used to evaluate the cache performance among the concerning algorithms.