A Time Domain Built-In Self-Test Methodology for SNDR and ENOB Tests of Analog-to-Digital Converters

  • Authors:

  • Hsin-Wen Ting;Bin-Da Liu;Soon-Jyh Chang

  • Affiliations:

  • National Cheng Kung University;National Cheng Kung University;National Cheng Kung University

  • Venue:
  • ATS '04 Proceedings of the 13th Asian Test Symposium
  • Year:
  • 2004

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Abstract

In this paper, a built-in self-test (BIST) methodology used to test the important transmission parameters, signal-to-noise-and-distortion (SNDR) and effective number of bits (ENOB), of analog-to-digital converters (ADCs) is proposed. A sigma-delta modulation based signal generator is presented which can concurrently produce high frequency analog sinusoidal test stimuli and digital sinusoidal reference signals on chip. Unlike conventional test methods which compute these parameters based on the spectrum information after fast Fourier transformation (FFT), the presented BIST scheme can directly determine the noise-and-distortion power density and SNDR in time domain. It can reduce the high cost of implementing FFT and windowing functional blocks, and alleviate the difficulty in setting the test frequencies and measurement conditions.