Bio-inspired Event Coded Configurable Analog Circuit Block
ICES '08 Proceedings of the 8th international conference on Evolvable Systems: From Biology to Hardware
Subthreshold parallel FM-to-digital Δ-Σ converter with output-bit-stream addition by interleaving
IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special section on 2008 custom integrated circuits conference (CICC 2008)
A level-crossing analog-to-digital converter with triangular dither
IEEE Transactions on Circuits and Systems Part I: Regular Papers
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In this paper, we discuss how asynchronous design techniques can be used in the implementation of continuous-time signal processors. Such processors are presented by signals developed by continuous-time analog-to-digital converters which involve no sampling, and thus do not exhibit aliasing; in addition, the resulting in-band quantization error is lower than in conventional techniques. Several design considerations are given, and preliminary experimental results are presented.