Designer-Driven Topology Optimization for Pipelined Analog to Digital Converters

Authors:
Yu-Tsun Chien;Dong Chen;Jea-Hong Lou;Gin-Kou Ma;Rob A. Rutenbar;Tamal Mukherjee
Affiliations:
SoC Technology Center, Industrial Technology Research Institute, Hsinchu, Taiwan;Carnegie Mellon University, Pittsburgh, Pennsylvania;SoC Technology Center, Industrial Technology Research Institute, Hsinchu, Taiwan;SoC Technology Center, Industrial Technology Research Institute, Hsinchu, Taiwan;Carnegie Mellon University, Pittsburgh, Pennsylvania;Carnegie Mellon University, Pittsburgh, Pennsylvania
Venue:
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Year:
2005

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Abstract

This paper suggests a practical "hybrid" synthesis methodology which integrates designer-derived analytical models for system-level description with simulation-based models at the circuit level. We show how to optimize stage-resolution to minimize the power in a pipelined ADC. Exploration (via detailed synthesis) of several ADC configurations is used to show that a 4-3-2... resolution distribution uses the least power for a 13-bit 40 MSPS converter in a 0.25 µm CMOS process.