Distributed associative memory for use in scene analysis
Image and Vision Computing
Matching performance of binary correlation matrix memories
Transactions of the Society for Computer Simulation International - Special issue: simulation methodology in transportation systems
Sparse Distributed Memory
Sparse, distributed memory prototpe: principles of operation
Sparse, distributed memory prototpe: principles of operation
On the Computational Power of Winner-Take-All
Neural Computation
IJCAI'07 Proceedings of the 20th international joint conference on Artifical intelligence
A modified sparse distributed memory model for extracting clean patterns from noisy inputs
IJCNN'09 Proceedings of the 2009 international joint conference on Neural Networks
A system for transmitting a coherent burst of activity through a network of spiking neurons
WIRN'05 Proceedings of the 16th Italian conference on Neural Nets
ICANN'05 Proceedings of the 15th international conference on Artificial Neural Networks: biological Inspirations - Volume Part I
Integer sparse distributed memory: Analysis and results
Neural Networks
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An analysis is presented of a sparse distributed memory (SDM) inspired by that described by Kanerva | Kanerva, P. (1988). Sparse distributed memory. Cambridge, MA: MIT Press | but modified to facilitate an implementation based on spiking neurons. The memory presented here employs sparse binary N-of-M codes, unipolar binary synaptic weights and a simple Hebbian learning rule. It is a two-layer network, the first (fixed) layer being similar to the 'address decoder' in Jaeckel's |Jaeckel, L.A. (1989). A class of designs for a sparse distributed memory. RIACS Technical Report 89.30, NASA Ames Research Centre| 'hyperplane' variant of Kanerva's SDM and the second (writeable) 'data store' layer being a correlation matrix memory as first proposed by Willshaw et al. | Willshaw, D. J., Buneman, O.P., & Longuet-Higgins, H.C. (1969). Non-holographic associative memory. Nature, 222, 960-962|. The resulting network is shown to have good storage efficiency and is scalable. The analysis is supported by numerical simulations and gives results that enable the configuration of the memory to be optimised for a range of noiseless and noisy environments.