Run-Time Reconfiguration Support for FPGAs with Embedded CPUs: The Hardware Layer

Authors:
Joao Canas Ferreira;Miguel M. Silva
Affiliations:
FEUP/DEEC and INESC Porto, Portugal;FEUP/DEEC, Portugal
Venue:
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
Year:
2005

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Abstract

We report on work in progress that aims to provide a run-time management kernel for applications running on FPGAs with embedded CPUs. We describe the global concept, the organization of the hardware environment for the reconfigurable modules and the reconfiguration strategy supported by the run-time management kernel. Practical issues concerning the implementation of the system on a Virtex-II Pro-based board are also addressed.