Parametric fault diagnosis for analog systems using functional mapping
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Hierarchical Specification-Driven Analog Fault Modeling for Efficient Fault Simulation and Diagnosis
Proceedings of the IEEE International Test Conference
| Hi-index | 0.00 |
A methodology for diagnosing and characterizing multiple faults in analog circuits, and results from applying this methodology to a real circuit is presented. Our method is a novel combination of a Simulation Before Test (SBT) and Interpolation After Test (IAT) methodology. Our method uses the classical SBT concept of a fault dictionary database constructed before test. It also uses a method of IAT that consists in using the measurements to guide an interpolation algorithm to effectively increase the local resolution of the fault dictionary database and thereby yield the most likely test parameter value. Our method's underlying principle is to characterize the fault-free and faulty circuit cases by their impulse responses obtained by simulation and subsequently stored in a fault dictionary database. The method uses the technique of Lagrange interpolation to resolve the faults between the fault dictionary database entries and the actual measurements. Our experimental results reveal that the method is effective for characterizing faults when the simulations match the measurements sufficiently. Consequently, the method's effectiveness depends highly on the quality of the models used to build the dictionary as well as on the accuracy of the measurements.