Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
Comparative Study of CA-based PRPGs and LFSRs with Phase Shifters
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Built-In TPG with Designed Phaseshifts
VTS '03 Proceedings of the 21st IEEE VLSI Test Symposium
A unified method for phase shifter computation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Synthesis of one-dimensional linear hybrid cellular automata
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Cellular automata-based test pattern generators with phase shifters
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Automated synthesis of phase shifters for built-in self-test applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Phase shifters are used in conjunction with Linear Feedback Shift Registers and Cellular Automata in order to impose sufficient channel separations on the bit sequences produced by their successive cells. The aim is to reduce structural correlations and/or linear dependencies that are problematic for pseudorandom and pseudoexhaustive built-in test pattern generation (TPG). In this paper we present a synthesis approach that merges the logic of the original TPG mechanism with that of the required phase shifter network and yields a new compact structure that can offer lower area overhead and improved frequency of operation than the existing approach.