Implementation of a Wireless Multimedia DSP Chip for Mobile Applications

Authors:
Jung L. Lee;Myung H. Sunwoo
Affiliations:
School of Electrical and Computer Engineering, Ajou University, Suwon, Korea 442-749;School of Electrical and Computer Engineering, Ajou University, Suwon, Korea 442-749
Venue:
Journal of VLSI Signal Processing Systems
Year:
2005

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Abstract

This paper presents the implementation of a wireless multimedia DSP chip for mobile applications. The implemented DSP chip supports communication instructions for Viterbi, timing synchronization, etc. as well as multimedia instructions. The DSP can handle variable length data and perform four MACs in a cycle. The proposed DSP employs parallel processing techniques, such as SIMD, vector processing, DSP schemes and adopts low power features for wireless applications. The implemented DSP chip includes test circuits and various peripherals, such as DMA, bus arbitration, timer, etc. This chip has been modeled by Verilog HDL and implemented using the 0.35 驴m HCB60 library. The total gate count excluding memory is about 170,000 gates and the clock frequency is 100 MHz.