Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
3d Computer Graphics
The visual instruction set (VIS) in UltraSPARC
COMPCON '95 Proceedings of the 40th IEEE Computer Society International Conference
64-bit and Multimedia Extensions in the PA-RISC 2.0 Architecture
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
Communications of the ACM
Media architecture: general purpose vs. multiple application-specific programmable processor
DAC '98 Proceedings of the 35th annual Design Automation Conference
A performance study of out-of-order vector architectures and short registers
ICS '98 Proceedings of the 12th international conference on Supercomputing
Vector architectures: past, present and future
ICS '98 Proceedings of the 12th international conference on Supercomputing
Switcherland: a QoS communication architecture for workstation clusters
Proceedings of the 25th annual international symposium on Computer architecture
Performance analysis of Intel MMX technology for an H.263 video H.263 video encoder
MULTIMEDIA '98 Proceedings of the sixth ACM international conference on Multimedia
A bandwidth-efficient architecture for media processing
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Simple vector microprocessors for multimedia applications
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Evaluating MMX technology using DSP and multimedia applications
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Performance of image and video processing with general-purpose processors and media ISA extensions
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
An Algorithm-Hardware-System Approach to VLIW Multimedia Processors
Journal of VLSI Signal Processing Systems - special issue on multimedia signal processing
Adding a vector unit to a superscalar processor
ICS '99 Proceedings of the 13th international conference on Supercomputing
Power efficient mediaprocessors: design space exploration
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Low-power behavioral synthesis optimization using multiple precision arithmetic
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Exploiting a new level of DLP in multimedia applications
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
MOM: a matrix SIMD instruction set architecture for multimedia applications
SC '99 Proceedings of the 1999 ACM/IEEE conference on Supercomputing
Extended design reuse trade-offs in hardware-software architecture mapping
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Predicting performance potential of modern DSPs
Proceedings of the 37th Annual Design Automation Conference
Smart Memories: a modular reconfigurable architecture
Proceedings of the 27th annual international symposium on Computer architecture
A Family of Variable-Precision Interval Arithmetic Processors
IEEE Transactions on Computers
Polygon rendering on a stream architecture
HWWS '00 Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
Bidwidth analysis with application to silicon compilation
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Exploiting superword level parallelism with multimedia instruction sets
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Integer Multiplication with Overflow Detection or Saturation
IEEE Transactions on Computers - Special issue on computer arithmetic
ACM Transactions on Computer Systems (TOCS)
VVS '00 Proceedings of the 2000 IEEE symposium on Volume visualization
Efficient conditional operations for data-parallel architectures
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
I3D '01 Proceedings of the 2001 symposium on Interactive 3D graphics
Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs
Proceedings of the conference on Design, automation and test in Europe
Exploring Hypermedia Processor Design Space
Journal of VLSI Signal Processing Systems - Special issue on multimedia signal processing
A study of memory system performance of multimedia applications
Proceedings of the 2001 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Parallel implementation of self-organizing maps
Self-Organizing neural networks
Multimedia Execution Hardware Accelerator
Journal of VLSI Signal Processing Systems - Parallel VLSI architectures for image and video processing
Parallelization and performance of 3D ultrasound imaging beamforming algorithms on modern clusters
ICS '02 Proceedings of the 16th international conference on Supercomputing
Real-Time Software Video Codec with a Fast Adaptive Motion Vector Search
Journal of VLSI Signal Processing Systems - Special issue on signal processing systems design and implementation
Compilation Techniques for Multimedia Processors
International Journal of Parallel Programming
A Vectorizing Compiler for Multimedia Extensions
International Journal of Parallel Programming
Video compression with parallel processing
Parallel Computing - Parallel computing in image and video processing
Reconfigurable media processing
Parallel Computing - Parallel computing in image and video processing
Subword Extensions for Video Processing on Mobile Systems
IEEE Concurrency
Efficient Polygon Clipping for an SIMD Graphics Pipeline
IEEE Transactions on Visualization and Computer Graphics
Internet Streaming SIMD Extensions
Computer
SH-5: The 64-Bit SuperH Architecture
IEEE Micro
Imagine: Media Processing with Streams
IEEE Micro
Real-time stereo within the VIDET Project
Real-Time Imaging
Linear-time Matrix Transpose Algorithms Using Vector Register File With Diagonal Registers
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Multimedia Extensions and Sub-word Parallelism in Image Processing: Preliminary Results
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Recent Developments in the Design of Conventional Cryptographic Algorithms
State of the Art in Applied Cryptography, Course on Computer Security and Industrial Cryptography - Revised Lectures
A Representation for Bit Section Based Analysis and Optimization
CC '02 Proceedings of the 11th International Conference on Compiler Construction
Data Compression Transformations for Dynamically Allocated Data Structures
CC '02 Proceedings of the 11th International Conference on Compiler Construction
Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler
IMS '00 Revised Papers from the Second International Workshop on Intelligent Memory Systems
Using Intel Streaming SIMD Extensions for 3D Geometry Processing
PCM '02 Proceedings of the Third IEEE Pacific Rim Conference on Multimedia: Advances in Multimedia Information Processing
Embedded processor design challenges
Quantifying behavioral differences between multimedia and general-purpose workloads
Journal of Systems Architecture: the EUROMICRO Journal
Three-dimensional memory vectorization for high bandwidth media memory systems
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Exploiting data-width locality to increase superscalar execution bandwidth
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Architectural approaches for video compression
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
High-Level Synthesis with SIMD Units
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Fast Subword Permutation Instructions Using Omega and Flip Network Stages
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
General-Purpose Processor Huffman Encoding Extension
ITCC '00 Proceedings of the The International Conference on Information Technology: Coding and Computing (ITCC'00)
Architectural techniques for accelerating subword permutations with repetitions
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Vectorizing for a SIMdD DSP architecture
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
An Analysis of Cache Performance of Multimedia Applications
IEEE Transactions on Computers
The Reconfigurable Streaming Vector Processor (RSVPTM)
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
GWindows: robust stereo vision for gesture-based control of windows
Proceedings of the 5th international conference on Multimodal interfaces
A high-speed energy-efficient 64-bit reconfigurable binary adder
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Efficient orchestration of sub-word parallelism in media processors
Proceedings of the sixteenth annual ACM symposium on Parallelism in algorithms and architectures
An extended ANSI C for processors with a multimedia extension
International Journal of Parallel Programming
A scalable, clustered SMT processor for digital signal processing
MEDEA '03 Proceedings of the 2003 workshop on MEmory performance: DEaling with Applications , systems and architecture
Variable precision arithmetic circuits for FPGA-based multimedia processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Retargeting Sequential Image-Processing Programs for Data Parallel Execution
IEEE Transactions on Software Engineering
PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing
Journal of VLSI Signal Processing Systems
Implementation of a Wireless Multimedia DSP Chip for Mobile Applications
Journal of VLSI Signal Processing Systems
Accelerating Mobile Video: A 64-Bit SIMD Architecture for Handheld Applications
Journal of VLSI Signal Processing Systems
Journal of VLSI Signal Processing Systems
Processor Enhancements for Media Streaming Applications
Journal of VLSI Signal Processing Systems
A PC-based real-time stereo vision system
Machine Graphics & Vision International Journal
The design of a smart imaging core for automotive and consumer applications: a case study
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Contributions to the GNU compiler collection
IBM Systems Journal
Large volume visualization of compressed time-dependent datasets on GPU clusters
Parallel Computing - Parallel graphics and visualization
Optimizing mobile multimedia using SIMD techniques
Multimedia Tools and Applications
Auto-vectorization of interleaved data for SIMD
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
SODA: A Low-power Architecture For Software Radio
Proceedings of the 33rd annual international symposium on Computer Architecture
Real-Time Systems
Implementation of real-time watermarking scheme for high-quality video
MM&Sec '06 Proceedings of the 8th workshop on Multimedia and security
A programmable, high performance vector array unit used for real-time motion estimation
ICME '03 Proceedings of the 2003 International Conference on Multimedia and Expo - Volume 2
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
Configurable data memory for multimedia processing
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
The Impact of Multimedia Extensions for Multimedia Applications on Mobile Computing Systems
APCHI '08 Proceedings of the 8th Asia-Pacific conference on Computer-Human Interaction
Parallel processing for image and video processing: Issues and challenges
Parallel Computing
Supporting flexible streaming media protection through privacy-aware secure processors
Computers and Electrical Engineering
Low-power mixed-signal CVNS-based 64-bit adder for media signal processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A multi-streaming SIMD architecture for multimedia applications
Proceedings of the 6th ACM conference on Computing frontiers
MediaBench II video: Expediting the next generation of video systems research
Microprocessors & Microsystems
Implementation of the DWT using intel IA-32 SIMD extensions
MAMECTIS'08 Proceedings of the 10th WSEAS international conference on Mathematical methods, computational techniques and intelligent systems
Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit
Journal of Signal Processing Systems
Performance Improvement of Multimedia Kernels by Alleviating Overhead Instructions on SIMD Devices
APPT '09 Proceedings of the 8th International Symposium on Advanced Parallel Processing Technologies
SHA: a design for parallel architectures?
EUROCRYPT'97 Proceedings of the 16th annual international conference on Theory and application of cryptographic techniques
ICIC'09 Proceedings of the 5th international conference on Emerging intelligent computing technology and applications
A multi-streaming SIMD multimedia computing engine
Microprocessors & Microsystems
Automatic vector instruction selection for dynamic compilation
Proceedings of the 19th international conference on Parallel architectures and compilation techniques
Data dependence analysis for intra-register vectorization
ISPDC'03 Proceedings of the Second international conference on Parallel and distributed computing
Efficient Selection of Vector Instructions Using Dynamic Programming
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Reconfigurable Morphological Image Processing Accelerator for Video Object Segmentation
Journal of Signal Processing Systems
Parallel programming for multimedia applications
Multimedia Tools and Applications
Color-Aware Instructions for Embedded Superscalar Processors
Journal of Signal Processing Systems
EUC'05 Proceedings of the 2005 international conference on Embedded and Ubiquitous Computing
On dependence analysis for SIMD enhanced processors
VECPAR'04 Proceedings of the 6th international conference on High Performance Computing for Computational Science
ICA3PP'10 Proceedings of the 10th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I
Automatic detection of saturation and clipping idioms
LCPC'02 Proceedings of the 15th international conference on Languages and Compilers for Parallel Computing
Architectural enhancements for color image and video processing on embedded systems
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
Real-Time watermark embedding for high resolution video watermarking
IWSEC'06 Proceedings of the 1st international conference on Security
Exploiting both pipelining and data parallelism with SIMD reconfigurable architecture
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
Hierarchical visualization and compression of large volume datasets using GPU clusters
EG PGV'04 Proceedings of the 5th Eurographics conference on Parallel Graphics and Visualization
Algorithms and architectures for 2D discrete wavelet transform
The Journal of Supercomputing
Experiments in parallel matrix multiplication on multi-core systems
ICA3PP'12 Proceedings of the 12th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I
Invasive computing in HPC with X10
Proceedings of the third ACM SIGPLAN X10 Workshop
DRMA: dynamically reconfigurable MPSoC architecture
Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators
ACM Transactions on Computer Systems (TOCS)
Automated generation of efficient instruction decoders for instruction set simulators
Proceedings of the International Conference on Computer-Aided Design
Optimizing image processing on multi-core CPUs with Intel parallel programming technologies
Multimedia Tools and Applications
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The MMX TM Technology extension to the Intel Architecture is designed to accelerate multimedia and communications software running on Intel Architecture processors. The technology introduces new data types and instructions that implement a SIMD architecture model and is defined in a way that maintains full compatibility with all existing Intel Architecture processors, operating systems, and applications. MMX technology on average delivers 1.5 to 2 times performance gains for multimedia and communications applications in comparison to running on the same processor but without using MMX technology. This extension is the most significant addition to the Intel Architecture since the Intel I386 and will be implemented on proliferations of the Pentium processor family and also appear on future Intel Architecture processors.