Architectural enhancements for color image and video processing on embedded systems

  • Authors:

  • Jongmyon Kim;D. Scott Wills;Linda M. Wills

  • Affiliations:

  • Chip Solution Center, Samsung Advanced Institute of Technology, Kyungki-do, South Korea;School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, Georgia;School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, Georgia

  • Venue:
  • ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
  • Year:
  • 2005

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Abstract

Application-specific extensions of a processor provide an efficient mechanism to meet the growing performance demands of multimedia applications. This paper presents a color-aware instruction set extension (CAX) for embedded multimedia systems that supports vector processing of color image sequences. CAX supports parallel operations on two-packed 16-bit (6:5:5) YCbCr (luminance-chrominance) data in a 32-bit datapath processor, providing greater concurrency and efficiency for color image and video processing. Unlike typical multimedia extensions (e.g., MMX, VIS, and MDMX), CAX harnesses parallelism within the human perceptual YCbCr space, rather than depending solely on generic subword parallelism. Experimental results on an identically configured, dynamically scheduled 4-way superscalar processor indicate that CAX outperforms MDMX (a representative MIPS multimedia extension) in terms of speedup (3.9× with CAX, but only 2.1× with MDMX over the baseline performance) and energy reduction (68% to 83% reduction with CAX, but only 39% to 69% reduction with MDMX over the baseline). More exhaustive simulations are conducted to provide an in-depth analysis of CAX on machines with varying issue widths, ranging from 1 to 16 instructions per cycle. The impact of the CAX plus loop unrolling is also presented.