MC68020 32-BIT microprocessor user's manual
MC68020 32-BIT microprocessor user's manual
Evaluating MMX technology using DSP and multimedia applications
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Performance of image and video processing with general-purpose processors and media ISA extensions
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
Exploiting SIMD parallelism in DSP and multimedia algorithms using the AltiVec technology
ICS '99 Proceedings of the 13th international conference on Supercomputing
Exploiting superword level parallelism with multimedia instruction sets
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Internet Streaming SIMD Extensions
Computer
VIS Speeds New Media Processing
IEEE Micro
MicroUnity's MediaProcessor Architecture
IEEE Micro
ASAP '00 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
The visual instruction set (VIS) in UltraSPARC
COMPCON '95 Proceedings of the 40th IEEE Computer Society International Conference
An Architectural Overview of the Programmable Multimedia Processor, TM-1
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
Memory System Support for Image Processing
PACT '99 Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques
Design and Characterization of the Berkeley Multimedia Workload
Design and Characterization of the Berkeley Multimedia Workload
Multimedia Instruction Sets for General Purpose Microprocessors: a
Multimedia Instruction Sets for General Purpose Microprocessors: a
Measuring the Performance of Multimedia Instruction Sets
Measuring the Performance of Multimedia Instruction Sets
High-Performance Image Processing Using Special-Purpose CPU Instructions: The
High-Performance Image Processing Using Special-Purpose CPU Instructions: The
A scalable wide-issue clustered VLIW with a reconfigurable interconnect
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Implementation of a streaming execution unit
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Synthesis and verification
Matrix register file and extended subwords: two techniques for embedded media processors
Proceedings of the 2nd conference on Computing frontiers
The CSI multimedia architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Avoiding data conversions in embedded media processors
Proceedings of the 2005 ACM symposium on Applied computing
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A Simple High-Speed Multiplier Design
IEEE Transactions on Computers
Avoiding conversion and rearrangement overhead in SIMD architectures
International Journal of Parallel Programming
Versatility of extended subwords and the matrix register file
ACM Transactions on Architecture and Code Optimization (TACO)
Configurable data memory for multimedia processing
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
Optimizing techniques for saturated arithmetic with first-order linear recurrence
Proceedings of the 2009 ACM symposium on Applied Computing
An Enhanced DMA Controller in SIMD Processors for Video Applications
ARCS '09 Proceedings of the 22nd International Conference on Architecture of Computing Systems
A multi-streaming SIMD architecture for multimedia applications
Proceedings of the 6th ACM conference on Computing frontiers
A new redundant binary booth encoding for fast 2n-bit multiplier design
IEEE Transactions on Circuits and Systems Part I: Regular Papers
A multi-streaming SIMD multimedia computing engine
Microprocessors & Microsystems
Color-Aware Instructions for Embedded Superscalar Processors
Journal of Signal Processing Systems
EUC'05 Proceedings of the 2005 international conference on Embedded and Ubiquitous Computing
Boosting the performance of multimedia applications using SIMD instructions
CC'05 Proceedings of the 14th international conference on Compiler Construction
Architectural enhancements for color image and video processing on embedded systems
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
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Many microprocessor instruction sets include instructions for accelerating multimedia applications such as DVD playback, speech recognition, and 3D graphics. Despite general agreement on the need to support this emerging workload, there are considerable differences between the instruction sets that have been designed to do so. In this paper, we study the performance of five instruction sets on kernels extracted from a broad multimedia workload. We compare the performance of contemporary implementations of each extension against each other as well as to the original compiled C performance. From our analysis, we determine how well multimedia workloads map to current instruction sets, noting what was useful and what was not. We also propose two enhancements: fat subwords and strided memory operations.