The SPARC architecture manual (version 9)
The SPARC architecture manual (version 9)
The visual instruction set (VIS) in UltraSPARC
COMPCON '95 Proceedings of the 40th IEEE Computer Society International Conference
UltraSPARC: the next generation superscalar 64-bit SPARC
COMPCON '95 Proceedings of the 40th IEEE Computer Society International Conference
Measuring the Performance of Multimedia Instruction Sets
IEEE Transactions on Computers
Integrated I-cache Way Predictor and Branch Target Buffer to Reduce Energy Consumption
ISHPC '02 Proceedings of the 4th International Symposium on High Performance Computing
A Performance Study of Modern Web Server Applications
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
A Statistically Rigorous Approach for Improving Simulation Methodology
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Improving Computer Architecture Simulation Methodology by Adding Statistical Rigor
IEEE Transactions on Computers
A predictive decode filter cache for reducing power consumption in embedded processors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Hi-index | 0.01 |
The UltraSPARC-IIi allows a system the benefits of UltraSPARC performance and bandwidth, while enabling the cost effective use of PC-class system components. Sun's popular SolarisTM operating system is fully supported, and all UltraSPARC software is compatible. It is a 64-bit superscalar SPARCTM V9 machine, targeted for use in uniprocessor systems, that is an example of a high-performance system-on-a-chip. Functions spanning at least three separate complex system ASICs along with a modified UltraSPARC-II core are combined into one coherent system on a single die running at 300 MHz. The net effect is a general purpose CPU that contains an integrated DRAM controller, PCI 2.1 compatible 66MHz/32-bit I/O interface, high-end UltraSPARC Port ArchitectureTM (UPA) bus interface, second-level cache controller, three MMUs, three TLBs, flexible interrupts, plus other important system functions and V9 extensions. The most notable of the extensions to V9 is VISTM - extended instruction set for imaging and networking. The result is a very cost effective platform for desktop, server, and high-performance networking, telecommunications, and imaging embedded systems.