UltraSPARC: the next generation superscalar 64-bit SPARC

Authors:
D. Greenley;J. Bauman;D. Chang;D. Chen;R. Eltejaein;P. Ferolito;P. Fu;R. Garner;D. Greenhill;H. Grewal;K. Holdbrook;B. Kim;L. Kohn;H. Kwan;M. Levitt;G. Maturana;D. Mrazek;C. Narasimhaiah;K. Normoyle;N. Parveen;P. Patel;A. Prabhu;M. Tremblay;M. Wong;L. Yang;K. Yarlagadda;R. Yu;R. Yung;G. Zyner
Affiliations:
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Venue:
COMPCON '95 Proceedings of the 40th IEEE Computer Society International Conference
Year:
1995

Citing 0
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UltraSPARC-I

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Design decisions influencing the UltraSPARC's instruction fetch architecture

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UltraSPARC-IIi: Expanding the Boundaries of a System on a Chip

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Testability Analysis and Scalable Test Generation for High-Speed Floating-Point Units

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Abstract

UltraSPARC is the first microprocessor from Sun Microsystems' SPARC Technology Business to implement the new 64-bit SPARC V9 architecture. ULtraSPARC is equipped with unique multimedia capabilities and is capable of 4-way superscalar instruction dispatch, with an emphasis on maximal system efficiency and throughput in the execution of complex, memory-intensive applications. UltraSPARC maintains a strict binary compatibility with the thousands of existing 32-bit applications developed for other SPARC processors. This paper describes the feature set and operation of UItraSPARC.