Reconfigurable media processing
Parallel Computing - Parallel computing in image and video processing
Measuring the Performance of Multimedia Instruction Sets
IEEE Transactions on Computers
Matrix register file and extended subwords: two techniques for embedded media processors
Proceedings of the 2nd conference on Computing frontiers
Avoiding conversion and rearrangement overhead in SIMD architectures
International Journal of Parallel Programming
Limitations of special-purpose instructions for similarity measurements in media SIMD extensions
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
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Complex application-specific media instructions and kernels are emulated with simple to implement extended subword instructions. We show that assuming extended register file entries to accommodate intermediate results and by implementing a few simple instructions, packing/unpacking, saturation, and frequently used complex instructions can be practically eliminated. It is shown that in most emulations there is a potential performance improvement, making the proposed scheme suitable for embedded processors with a limited hardware budget.