Challenges to Combining General-Purpose and Multimedia Processors

Authors:
Thomas M. Conte;Pradeep K. Dubey;Matthew D. Jennings;Ruby B. Lee;Alex Peleg;Salliah Rathnam;Mike Schlansker;Peter Song;Andrew Wolfe
Affiliations:
-;-;-;-;-;-;-;-;-
Venue:
Computer
Year:
1997

Citing 7
Cited 27

Intel MMX for multimedia PCs

Communications of the ACM
MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems

MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Guest Editors' Introduction: Media Processing: A New Design Target

IEEE Micro
VIS Speeds New Media Processing

IEEE Micro
MMX Technology Extension to the Intel Architecture

IEEE Micro
Subword Parallelism with MAX-2

IEEE Micro
Hardware-Software Interactions on Mpact

IEEE Micro

A bandwidth-efficient architecture for media processing

MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Performance of image and video processing with general-purpose processors and media ISA extensions

ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
MOM: a matrix SIMD instruction set architecture for multimedia applications

SC '99 Proceedings of the 1999 ACM/IEEE conference on Supercomputing
Cache performance for multimedia applications

ICS '01 Proceedings of the 15th international conference on Supercomputing
A study of memory system performance of multimedia applications

Proceedings of the 2001 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Variability in the execution of multimedia applications and implications for architecture

ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Configuring of Algorithms in Mapping into Hardware

The Journal of Supercomputing
Saving energy with architectural and frequency adaptations for multimedia applications

Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Application-adaptive intelligent cache memory system

ACM Transactions on Embedded Computing Systems (TECS)
Joint local and global hardware adaptations for energy

Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
A Vectorizing Compiler for Multimedia Extensions

International Journal of Parallel Programming
Measuring the Performance of Multimedia Instruction Sets

IEEE Transactions on Computers
A Two Dimensional Vector Architecture for Multimedia

Euro-Par '01 Proceedings of the 7th International Euro-Par Conference Manchester on Parallel Processing
Heterogeneous Clustered Processors: Organisation and Design

Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
A Representation for Bit Section Based Analysis and Optimization

CC '02 Proceedings of the 11th International Conference on Compiler Construction
A Quantitative Understanding of the Performance of Reconfigurable Coprocessors

FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Quantifying behavioral differences between multimedia and general-purpose workloads

Journal of Systems Architecture: the EUROMICRO Journal
Design and characterization of the Berkeley multimedia workload

Multimedia Systems
Bottlenecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements

IEEE Transactions on Computers
An Analysis of Cache Performance of Multimedia Applications

IEEE Transactions on Computers
Performance of reconfigurable architectures for image-processing applications

Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
Teleport messaging for distributed stream programs

Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming
A configurable system-on-chip architecture for embedded and real-time applications: concepts, design and realization

Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable embedded systems: Synthesis, design and application
Customized SIMD unit synthesis for system on programmable chip: a foundation for HW/SW partitioning with vectorization

ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Real-time arithmetic unit

Real-Time Systems
Sorter based permutation units for media-enhanced microprocessors

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A stream architecture supporting multiple stream execution models

ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture

Quantified Score

Hi-index	4.11

Visualization

Abstract

Multimedia workloads have always held an important role in embedded applications, but now they are becoming increasingly common in general-purpose computing as well. Over the past three years, the major vendors of general-purpose processors (GPPs) have announced extensions to their instruction set architectures that supposedly enhance the performance of multimedia workloads. Merging new multimedia instructions with existing GPPs poses several challenges. Also, some doubt remains as to whether multimedia extensions are a real development or just a competition-induced fad in the GPP industry. If it is indeed a development, how must current processor microarchitectures change in reaction? Multimedia extensions are here to stay, but compiler designers, language designers, and microarchitects face large, difficult problems. The ultimate solution will depend on collaboration between universities and industry-a successful combination familiar to most processor designers.