The design of a smart imaging core for automotive and consumer applications: a case study

Authors:
Wido Kruijtzer;Winfried Gehrke;Victor Reyes;Ghiath Alkadi;Thomas Hinz;Jorn Jöchalsky;Bruno Steux
Affiliations:
Philips Research, The Netherlands;Philips Semiconductors Hamburg, Germany;University of Las Palmas GC, Spain;Philips Research, The Netherlands;Philips Semiconductors Hamburg, Germany;University of Hannover, Germany;École des Mines de Paris, France
Venue:
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Year:
2005

Citing 7
Cited 0

A methodology for the design of application specific instruction set processors (ASIP) using the machine description language LISA

Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
MMX Technology Extension to the Intel Architecture

IEEE Micro
A 100-GOPS Programmable Processor for Vehicle Vision Systems

IEEE Design & Test
Transaction level modeling: an overview

Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
CASSE: A System-Level Modeling and Design-Space Exploration Tool for Multiprocessor Systems-on-Chip

DSD '04 Proceedings of the Digital System Design, EUROMICRO Systems
Design and Programming of Embedded Multiprocessors: An Interface-Centric Approach

CODES+ISSS '04 Proceedings of the international conference on Hardware/Software Codesign and System Synthesis: 2004
Application specific instruction-set processor template for motion estimation in video applications

IEEE Transactions on Circuits and Systems for Video Technology

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper describes the design of a low-cost, low-power smart imaging core that can be embedded in cameras. The core integrates an ARM 9 processor, a camera interface and two specific hardware blocks for image processing: a smart imaging coprocessor and an enhanced motion estimator. Both coprocessors have been designed using high-level synthesis tools taking the C programming language as a starting point. The resulting RTL code of each coprocessor has been synthesized and verified on an FPGA board. Two automotive and two mobile smart imaging applications are mapped onto the resulting smart imaging core. This mapping process of the original C++ applications onto the smart imaging core is also presented in this paper.