Implementation of dynamic streaming Applications on heterogeneous multi-Processor architectures
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
The design of a smart imaging core for automotive and consumer applications: a case study
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Design, Synthesis, and Test of Networks on Chips
IEEE Design & Test
Supporting task migration in multi-processor systems-on-chip: a feasibility study
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Overview of the MPSoC design challenge
Proceedings of the 43rd annual Design Automation Conference
Programming models and HW-SW interfaces abstraction for multi-processor SoC
Proceedings of the 43rd annual Design Automation Conference
A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Thermal balancing policy for streaming computing on multiprocessor architectures
Proceedings of the conference on Design, automation and test in Europe
A platform-based design framework for joint SW/HW multiprocessor systems design
Journal of Systems Architecture: the EUROMICRO Journal
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We present design technology for the structured design and programming of embedded multi-processor systems. It comprises a task-level interface that can be used both for developing parallel application models and as a platform interface for implementing applications on multi-processor architectures. Associated mapping technology supports refinement of application models towards implementation. By linking application development and implementation aspects, the technology integrates the specification and design phases in the MPSoC design process. Two design cases demonstrate the efficient implementation of the platform interface on different architectures. Industry-wide standardization of a task-level interface can facilitate reuse of function-specific hardware / software modules across companies.